Selling PLC Fatek: Effective automation solution for all industries

Mechanism of operation of Fatek PLC

Here’s a more detailed explanation of the mechanism of operation of Fatek PLC:

Input Scan Phase

• The PLC’s CPU initiates the scan cycle by reading the status of all its digital input channels. These channels receive signals from external devices like sensors, switches, pushbuttons, or other control elements.
• The PLC’s internal memory stores the current state of each digital input as a 1 (true) or 0 (false) value.
• For analog input channels, the PLC converts the analog voltage or current signal into a digital representation, typically using an analog-to-digital converter (ADC).
• The digitized analog input values are also stored in the PLC’s memory.

Program Execution Phase

• The PLC’s CPU retrieves the user-written program from its memory. This program is typically written in ladder logic, a graphical language that resembles electrical ladder diagrams.
• The program consists of logic instructions that define the relationships between input conditions and output actions.
• The CPU starts executing the program line by line, evaluating each instruction based on the current state of the digital and analog inputs.
• As the program executes, the CPU updates internal flags and variables based on the instruction results.

Output Update Phase

• Based on the results of program execution, the PLC’s CPU determines the desired state of each digital output channel.
• The CPU sends signals to the digital output modules, which switch the corresponding output circuits to either on or off states.
• For analog output channels, the CPU converts the desired analog value into a digital representation, typically using a digital-to-analog converter (DAC).
• The digitized analog output value is sent to the analog output module, which generates the corresponding analog voltage or current signal.

Communication Phase (Optional)

• Some Fatek PLC models, equipped with communication modules, can exchange data with other devices during this phase.
• Common communication protocols used by Fatek PLCs include Modbus RTU, Modbus TCP/IP, and Ethernet/IP.
• The PLC can act as a master or slave device, depending on the network configuration and application requirements.
• Communication allows for data exchange, monitoring, remote control, and integration with supervisory control and data acquisition (SCADA) systems.

Housekeeping Phase

• During this stage, the PLC’s CPU might perform housekeeping tasks like:
  • Updating internal timers and counters
  • Performing self-diagnostics to check system health
  • Refreshing data buffers
  • Managing communication timeouts

Additional Points

• Scan Cycle Time: The time it takes for a PLC to complete a full scan cycle is crucial for real-time control applications. Faster scan times are generally desired for applications requiring quick responses to input changes. Scan cycle time depends on factors like PLC model, program complexity, and I/O count.

• Memory Types: Fatek PLCs typically use a combination of volatile and non-volatile memory:

  • Volatile Random Access Memory (RAM): Stores the user program, current input/output states, and temporary data. RAM loses data when the PLC loses power.
  • Non-volatile Flash Memory: Stores the PLC configuration and program code permanently, even when the PLC is powered off.

• Programming Software: Fatek PLCs are typically programmed using WinProladder software, which provides a user-friendly graphical interface for creating and editing ladder logic programs. WinProladder includes features like syntax checking, simulation tools, and debugging capabilities.

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